# (Solved) : Question 3 15 Consider Four Register Operations Described Table Operation Description Loa Q42769552 . . .

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it should be the first column ABCD

Question 3 (15%) Consider the four register operations described in the table below. Operation Description A Load parallel data to destination в | Load the destination with all 1s Shift data down D No change Based on the table below, determine how the register operations are controlled by the Mode Select variables Sl and SO. Mode Select Result of a mod 3, where a is the 8th digit of SID S1 a mod 3=0 a mod 3 = 1 a mod 3 = 2 B (a) Show the implementation of the register at stage i using a suitable multiplexer, by using graphical symbols of the suitable multiplexer and D flip-flops of the concerned stages. (b) Suppose operation D is changed from “No change” to “Counting Up by 1”. The up-counting is done synchronously and serially. Draw the implementation of the register as a 4-bit register, with a suitable multiplexer and the correct combinational logic for the up-counting. In your answer, graphical symbol of multiplexer can be used, and all four stages of the register should be shown. Also include the Carry Output in your design. Show transcribed image text Question 3 (15%) Consider the four register operations described in the table below. Operation Description A Load parallel data to destination в | Load the destination with all 1s Shift data down D No change Based on the table below, determine how the register operations are controlled by the Mode Select variables Sl and SO. Mode Select Result of a mod 3, where a is the 8th digit of SID S1 a mod 3=0 a mod 3 = 1 a mod 3 = 2 B (a) Show the implementation of the register at stage i using a suitable multiplexer, by using graphical symbols of the suitable multiplexer and D flip-flops of the concerned stages. (b) Suppose operation D is changed from “No change” to “Counting Up by 1”. The up-counting is done synchronously and serially. Draw the implementation of the register as a 4-bit register, with a suitable multiplexer and the correct combinational logic for the up-counting. In your answer, graphical symbol of multiplexer can be used, and all four stages of the register should be shown. Also include the Carry Output in your design.

Answer to Question 3 (15%) Consider the four register operations described in the table below. Operation Description A Load parall…

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