Suppose we have a computer system which only uses 10 bits asmemory address. In addition it has a directly mapped L1 cache with8 blocks and block size of 8 bytes.
After powering up the CPU, we recorded the following memoryaccess trace expressed as word addresses, that is, memory addressis word address multiplied by 4. Further, each access is 4-byteword access (read or write).
3, 180, 43, 2, 191, 88, 190, 14, 181, 44, 190, 253
#1: Please fill in the following tables. The first row isalready filled as an example. (3pt)
| word address | memory address in binary | tag (binary) | index (binary) | offset (binary) | hit/miss |
| 3 | 0000001100 | 0000 | 001 | 100 | miss |
| 180 | |||||
| 43 | |||||
| 2 | |||||
| 191 | |||||
| 88 | |||||
| 190 | |||||
| 14 | |||||
| 181 | |||||
| 44 | |||||
| 190 | |||||
| 253 |
#2: For this sequence of memory access, what is the hit rate?And what is the miss rate? (2pt)
#3: Assume hit time for L1 cache is 3 cycles and memory accesstime is 24 cycles. What is AMAT (average memory access time) forthis sequence? (2pt)
Expert Answer
Answer to Suppose we have a computer system which only uses 10 bits as memory address. In addition it has a directly mapped L1 cac…