virtual address has 32 bits
physical memory is 1GB
page/frame is 4KB
4. [25 points] Continue with Question 2: suppose demand paging is used for virtual memory management. a) [5 points) Explain what is TLB and how it is used to improve system performance. b) [15 points] (Hint: use slides 49 and 50 from Week 8/ss08-Memory Management to help answer this question; disk access will only be necessary if the PTE’s valid bit is 0, thus causing a hard page fault.) Moreover, assume that TLB has an access time of 2 ns and the memory access time is 40 ns. The disk access time is 8 ms. The page table of a process and the TLB are given below. For each of the virtual address of the process given in binary: find the corresponding page number and calculate the time to access the memory location. If known, give the corresponding physical memory address. [Note: 1 second = 1,000 ms; and 1 ms = 1,000,000 ns.] Page table valid frame Index 0 TLB page frame 58 3 6 14 6 9 0 61 Page number Access time (ns) Physical Address Logical address 0..0 0001 0101 1010 0010 0..0 0010 1010 0110 1010 0..0 0110 1000 0010 1110 0..0 0100 0010 1011 0110 c. 15 points] Explain what happens during the translation of the address: 0.0 0100 0010 1011 0110; How does OS deal with such a scenario? Show transcribed image text 4. [25 points] Continue with Question 2: suppose demand paging is used for virtual memory management. a) [5 points) Explain what is TLB and how it is used to improve system performance. b) [15 points] (Hint: use slides 49 and 50 from Week 8/ss08-Memory Management to help answer this question; disk access will only be necessary if the PTE’s valid bit is 0, thus causing a hard page fault.) Moreover, assume that TLB has an access time of 2 ns and the memory access time is 40 ns. The disk access time is 8 ms. The page table of a process and the TLB are given below. For each of the virtual address of the process given in binary: find the corresponding page number and calculate the time to access the memory location. If known, give the corresponding physical memory address. [Note: 1 second = 1,000 ms; and 1 ms = 1,000,000 ns.] Page table valid frame Index 0 TLB page frame 58 3 6 14 6 9 0 61 Page number Access time (ns) Physical Address Logical address 0..0 0001 0101 1010 0010 0..0 0010 1010 0110 1010 0..0 0110 1000 0010 1110 0..0 0100 0010 1011 0110 c. 15 points] Explain what happens during the translation of the address: 0.0 0100 0010 1011 0110; How does OS deal with such a scenario?
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