Write a VERILOG code and test bench for an arithmetic/logic unit(ALU) does the following , and can be tested in on nexys 4board
This is to be implemented on ISE Design Suite – Xilinx 14.2
/* ALU Arithmetic and Logic OperationALU_Out = A + B;———————————————————————-ALU_Out = A – B;———————————————————————-ALU_Out = A * B;———————————————————————-ALU_Out = A / B;———————————————————————-ALU_Out = A << 1;———————————————————————-ALU_Out = A >> 1;———————————————————————-ALU_Out = A rotated left by 1;———————————————————————-ALU_Out = A rotated right by 1;———————————————————————-ALU_Out = A and B;———————————————————————-ALU_Out = A or B;———————————————————————-ALU_Out = A xor B;———————————————————————-ALU_Out = A nor B;———————————————————————-ALU_Out = A nand B;———————————————————————-ALU_Out = A xnor B;———————————————————————-ALU_Out = 1 if A>B else 0;———————————————————————-ALU_Out = 1 if A=B else 0;
6 or 4 bit for A and B , to be tested on the nexysboard
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Answer to Write a VERILOG code and test bench for an arithmetic/logic unit (ALU) does the following , and can be tested in on nexy…